1.    Supports DisplayPort (DP) Specification version 1.3 and Embedded DisplayPort (eDP) Specification version 1.4.
  2.    Support 2 Main Link Lanes at either 1.62Gb/s or 2.7Gb/s link rate
  3.    Supports input color depth 6, 8-bit per pixel in RGB format
  4.    Supports Enhanced Framing Mode
  5.    Support VESA and CEA timing standards up to 1920x1200 resolution in 8-bit input with 60Hz refresh rate
  6.    Support dynamic refresh rate switching
  7.    Fast and full Link Training for embedded DisplayPort system
  8.    Support eDP Authentication: Alternative Scramble Seed Reset and Alternative Framing
  9.    2 Lane DP/eDP bypass supported with high speed buffer/switch integrated, pass through AUX CH/HPD in eDP / DP bypass application
  10.    2 work modes: connect 27MHz crystal, inject 27MHz clock
  11.    De-SSC supported
  12.    High-speed Mux integrated to support DP/eDP output pin-multiplexed with LVDS output
  13.    Programmable LCD panel power sequence
  14.    Support 18-bit Single Port, 18-bit Dual Port, 24-bit Single Port and 24-bit Dual Port LVDS output interface
  15.    Support both OpenLDI and SPWG bit mapping for LVDS application
  16.    Support panel select by GPIO pins control or writing the chip registers.
  17.    Support flexible LVDS output pin swapping for top or bottom mount PCBs
  18.    Support internal test pattern
  19.    Blank panel during invalid input
  20.    Supports PWM Backlight luminance level control through AUX channel, PWM pin and BLUP/BLDN pin
  21.    Support Dynamic Backlight Control
  22.    Hot Plug Detection
  23.    Aux switch integrated
  24.    Loads Boot ROM automatically upon power up
  25.    Serial BOOT ROM data updated through I2C bus or AUX Channel
  26.    Support power management mechanism through AUX
  27.    Offered in a 68-pin QFN package  


     Chrontel’s CH7513A is a low-cost, low-power semiconductor device that translates the Embedded DisplayPort signal to the LVDS (Low-voltage Differential Signaling). This innovative
DisplayPort receiver with an integrated LVDS transmitter is specially designed to target the All-In-One PC and the notebook market segments. Through the CH7513A’s advanced decoding /encoding algorithm, the input DP/eDP high-speed serialized video data can be seamlessly converted to LVDS, a popular display technology for high-speed serial links in mid/large-sized LCD displays. Leveraging the DP/eDP’s unique source/sink “Link Training” routine, the CH7513A is capable of instantly bring up the video display to the LCD when the initialization process is completed between CH7513A and the graphic chip. The CH7513A is designed to meet the DisplayPort (DP) Specification version 1.3 and the Embedded DisplayPort Specification version 1.4. In the device’s receiver block, which supports two DP/eDP Main Link Lanes input with data rate running at either 1.62Gb/s or 2.7Gb/s, can accept RGB digital formats in either 18-bit 6:6:6 or 24-bit 8:8:8 for LVDS output up to 1920x1200. To comply with GPU’s new power saving scheme such as display frame rate reduction, the CH7513A is equipped with the Dynamic Refresh Rate switching method, which can automatically reduce to the low refresh rate supported by the LVDS panel. The integrated LVDS transmitter supports the single port and the dual ports LVDS outputs to drive display resolution up to WUXGA (1920x1200). CH7513A supports panel select by GPIO[0:3] pins control or writing the chip registers. To reduce EMI emission, the CH7513A’s LVDS encoder block has incorporated Spread Spectrum control and its spread percentage can be adjusted through the internal registers. The Backlight On/Off and the PWM are two luminance control functions designed in the CH7513A LVDS power control module. The brightness control commands sent through AUX Channel can be dynamically translated by CH7513A and converted into LCD backlight control signal. The CH7513A will save the last setting of brightness level into the BOOT ROM and restore it upon power up. The CH7513A can dynamically adjust backlight brigntness according to video stream to save power consumption and it supports OSD display in this way. The CH7513A will immediately convert the DP/eDP signal to LVDS output after DP/eDP Link Training is completed. This feature can be achieved by loading the panel’s EDID and the CH7513A’s configuration settings in the serial BOOT ROM connected to the CH7513A. During system power-up and upon completion of the DP/eDP Link Training through AUX Channel, CH7513A will generate LVDS signal according to the panel power-up timing sequencing stored in the BOOT ROM.




 PCB Layout and Design Guide for CH7513, AN-B053 rev0.5


















Copyright © 1998-2023 Chrontel, Inc. All Rights Reserved.         沪ICP备15010045号-1     沪公网安备31011502003526号          隐私保护 法律声明